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    <responseDate>2026-10-14T19:44:21Z</responseDate>
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    <identifier>10.57760/sciencedb.01009</identifier>
    <datestamp>2026-08-26T13:40:47Z</datestamp>
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  <dc:date>2026-08-26</dc:date>
  <dc:title>Simulation data of high-speed DAC-based transmitter</dc:title>
  <dc:identifier>doi:10.57760/sciencedb.01009</dc:identifier>
  <dc:language>en</dc:language>
  <dc:description>This dataset contains data related to a 128Gb/s high-speed transmitter. Including key indicators such as SFDR simulation, eye diagram simulation, and power consumption. The data is generated by simulation and can be used for performance validation and comparison with similar architectures.</dc:description>
  <dc:subject>transmitter; dac; clock calibration</dc:subject>
  <dc:creator>王则栋</dc:creator>
  <dc:creator>郑旭强</dc:creator>
  <dc:rights>RESTRICTED</dc:rights>
  <dc:type>dataset</dc:type>
  <dc:publisher>Science Data Bank</dc:publisher>
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