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    <identifier>10.57760/sciencedb.07398</identifier>
    <datestamp>2023-02-27T14:00:00Z</datestamp>
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  <dc:date>2023-02-27</dc:date>
  <dc:title>Switch speed limit method test data</dc:title>
  <dc:identifier>doi:10.57760/sciencedb.07398</dc:identifier>
  <dc:language>en</dc:language>
  <dc:description>Experiments show that compared with the simple speed limit scheme based on shared memory and mutex, this scheme can effectively reduce the rate jitter in transmission. For example, when the speed limit threshold is 3 Gbps, the speed limit jitter can be reduced by about 54%.</dc:description>
  <dc:subject>state programmable switch; dynamic configuration; traffic shaping</dc:subject>
  <dc:creator>Xuanli Cao</dc:creator>
  <dc:creator>Xiao Chen</dc:creator>
  <dc:creator>Lei Song</dc:creator>
  <dc:rights>PUBLIC</dc:rights>
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  <dc:publisher>Science Data Bank</dc:publisher>
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