2026-10-11T23:13:27Z https://www.scidb.cn/oai

10.57760/sciencedb.40903 2026-06-25T11:04:30Z

2026-06-25 200 MS/s 12 bit SAR ADC Dataset doi:10.57760/sciencedb.40903 en A synchronous clock controlled 200 MS/s 12 bit SAR ADC manufactured using a 28nm process, while employing a low-noise comparator. The paper has been published in the Microelectronics Journal journal. This dataset contains the data of the curves in the paper.  Analog-to-digital converter (ADC) ; Successive approximation register (SAR); Synchronous clock; Ring oscillator; Comparator; Low noise wu xiu heng Zhang Yuzhen Guo Xuan Jiang Zilin Luo Jiahui Bai Yun Liu Xinyu RESTRICTED dataset http://www.doi.org/10.1016/j.mejo.2026.107204. Science Data Bank