2026-10-14T15:03:56Z https://www.scidb.cn/oai

10.57760/sciencedb.41601 2026-07-09T10:48:09Z

2026-07-09 An 8-bit 1.25-GS/s Loop-Unrolled SAR ADC with Comparator Offset Calibration for High-Speed Data Acquisition in 28-nm CMOS doi:10.57760/sciencedb.41601 en This is a dataset for submitting papers to ICICM conferences, which includes an 8-bit 1.25GS/s cyclic unfolding SAR ADC with comparator offset calibration for high-speed data acquisition in a 28nm CMOS process. The image data includes FFT spectra, circuit structure diagrams, and performance comparison diagrams  SAR ADC; comparator offset calibration; high-speed data acquisition Bifei Wang Xuan Guo Shupei Yang Kai Sun Hanbo Jia Xinyu Liu RESTRICTED dataset Science Data Bank