2026-10-11T23:26:15Z https://www.scidb.cn/oai

10.57760/sciencedb.hjs.00690 2026-05-19T15:04:53Z

2026-05-19 Research on Beam Signal Processing for the Next-Generation BPM Processor at SSRF doi:10.57760/sciencedb.hjs.00690 en [Background] The Beam Position Measurement (BPM) processor is a critical device for achieving high-performance and stable operation of the Shanghai Synchrotron Radiation Facility (SSRF). With the ongoing digital and intelligent upgrade of SSRF, the BPM processor is required to interface with a new timing system and provide higher beam position measurement resolution, motivating the development of a new-generation BPM processor. [Purpose] This study aims to develop and validate a new-generation BPM processor capable of meeting the enhanced requirements for high-resolution beam position measurement, real-time signal processing, and integration with the upgraded timing system at SSRF. [Methods] A verification prototype of the new-generation BPM processor was developed based on a Zynq system-on-chip (SoC) architecture, integrating a digital signal processing motherboard, an ADC daughterboard, a clock daughterboard, and an analog front-end module. Complete beam signal processing functions were implemented on the FPGA and ARM processor, including system logic, timing interface, beam signal processing algorithms, data storage, high-speed data transmission, and EPICS IOC control software. Comprehensive performance evaluation tests were conducted under real beam conditions to assess measurement resolution, processing latency, and timing signal decoding capability. [Results] Experimental results demonstrate a turn-by-turn (TBT@694 kHz) position resolution of 310 nm, a fast acquisition (FA@10 kHz) resolution of 100 nm, and a slow acquisition (SA@10 Hz) resolution of 15 nm, all exceeding the design requirements. The FPGA-based digital signal processing latency is approximately 100 μs, satisfying the real-time measurement demands. In addition, successful decoding and reception of signals from the White Rabbit timing module are achieved. [Conclusions] The new BPM processor meets all engineering requirements for the next-generation SSRF BPM system and provides a solid foundation for the development of the full-scale processor prototype, supporting future high-precision and intelligent beam diagnostics at SSRF. SSRF; BPM Signal Processor; SoC FPGA; EPICS IOC wang shi long Lai Longwei Jiang Hang Wang Chenglin Xu Yongkang Tang Zhijie Xu Zhen Xie Wenwang Yan Qiurong PUBLIC https://creativecommons.org/licenses/by-nc/4.0/ dataset Science Data Bank